Annotation of prex/sys/arch/arm/gba/clock.c, Revision 1.1.1.1
1.1 nbrk 1: /*-
2: * Copyright (c) 2005-2007, Kohsuke Ohtani
3: * All rights reserved.
4: *
5: * Redistribution and use in source and binary forms, with or without
6: * modification, are permitted provided that the following conditions
7: * are met:
8: * 1. Redistributions of source code must retain the above copyright
9: * notice, this list of conditions and the following disclaimer.
10: * 2. Redistributions in binary form must reproduce the above copyright
11: * notice, this list of conditions and the following disclaimer in the
12: * documentation and/or other materials provided with the distribution.
13: * 3. Neither the name of the author nor the names of any co-contributors
14: * may be used to endorse or promote products derived from this software
15: * without specific prior written permission.
16: *
17: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27: * SUCH DAMAGE.
28: */
29:
30: /*
31: * clock.c - clock driver
32: */
33:
34: #include <kernel.h>
35: #include <timer.h>
36: #include <irq.h>
37:
38: /* Interrupt vector for timer (TMR0 of GBA) */
39: #define CLOCK_IRQ 3
40:
41: /* The clock rate per second ... 2^24 */
42: #define CLOCK_RATE 16777216L
43:
44: /* The initial counter value */
45: #define TIMER_COUNT (0xffff - (CLOCK_RATE / 64 / HZ))
46:
47: /* GBA timer registers */
48: #define TMR0_COUNT (*(volatile uint16_t *)0x4000100)
49: #define TMR0_CTRL (*(volatile uint16_t *)0x4000102)
50:
51: /* Timer frequency */
52: #define TMR_1_CLOCK 0x0000
53: #define TMR_64_CLOCK 0x0001
54: #define TMR_256_CLOCK 0x0002
55: #define TMR_1024_CLOCK 0x0003
56:
57: /* Cascade switch */
58: #define TMR_CASCADE 0x0004
59:
60: /* Interrupt for overflow */
61: #define TMR_IRQEN 0x0040
62:
63: /* Timer switch */
64: #define TMR_EN 0x0080
65:
66: /*
67: * Clock interrupt service routine.
68: * No H/W reprogram is required.
69: */
70: static int
71: clock_isr(int irq)
72: {
73:
74: irq_lock();
75: timer_tick();
76: irq_unlock();
77:
78: return INT_DONE;
79: }
80:
81: /*
82: * Initialize clock H/W chip.
83: * Setup clock tick rate and install clock ISR.
84: */
85: void
86: clock_init(void)
87: {
88: irq_t clock_irq;
89:
90: TMR0_COUNT = TIMER_COUNT;
91: TMR0_CTRL = (uint16_t)(TMR_IRQEN | TMR_64_CLOCK);
92: clock_irq = irq_attach(CLOCK_IRQ, IPL_CLOCK, 0, &clock_isr, NULL);
93: TMR0_CTRL |= TMR_EN;
94:
95: ASSERT(clock_irq != NULL);
96: }
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