Annotation of prex/sys/arch/i386/include/arch.h, Revision 1.1.1.1
1.1 nbrk 1: /*
2: * Copyright (c) 2005-2008, Kohsuke Ohtani
3: * All rights reserved.
4: *
5: * Redistribution and use in source and binary forms, with or without
6: * modification, are permitted provided that the following conditions
7: * are met:
8: * 1. Redistributions of source code must retain the above copyright
9: * notice, this list of conditions and the following disclaimer.
10: * 2. Redistributions in binary form must reproduce the above copyright
11: * notice, this list of conditions and the following disclaimer in the
12: * documentation and/or other materials provided with the distribution.
13: * 3. Neither the name of the author nor the names of any co-contributors
14: * may be used to endorse or promote products derived from this software
15: * without specific prior written permission.
16: *
17: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27: * SUCH DAMAGE.
28: */
29:
30: #ifndef _ARCH_H
31: #define _ARCH_H
32:
33: /*
34: * Common register frame for trap/interrupt.
35: * These cpu state are saved into top of the kernel stack in
36: * trap/interrupt entries. Since the arguments of system calls are
37: * passed via registers, the system call library is completely
38: * dependent on this register format.
39: *
40: * The value of ss & esp are not valid for kernel mode trap
41: * because these are set only when privilege level is changed.
42: */
43: struct cpu_regs {
44: uint32_t ebx; /* +0 (00) --- s/w trap frame --- */
45: uint32_t ecx; /* +4 (04) */
46: uint32_t edx; /* +8 (08) */
47: uint32_t esi; /* +12 (0C) */
48: uint32_t edi; /* +16 (10) */
49: uint32_t ebp; /* +20 (14) */
50: uint32_t eax; /* +24 (18) */
51: uint32_t ds; /* +28 (1C) */
52: uint32_t es; /* +32 (20) */
53: uint32_t trap_no; /* +36 (24) --- h/w trap frame --- */
54: uint32_t err_code; /* +40 (28) */
55: uint32_t eip; /* +44 (2C) */
56: uint32_t cs; /* +48 (30) */
57: uint32_t eflags; /* +52 (34) */
58: uint32_t esp; /* +56 (38) */
59: uint32_t ss; /* +60 (3C) */
60: };
61:
62: /*
63: * Kernel mode context for context switching.
64: */
65: struct kern_regs {
66: uint32_t eip; /* +0 (00) */
67: uint32_t ebx; /* +4 (04) */
68: uint32_t edi; /* +8 (08) */
69: uint32_t esi; /* +12 (0C) */
70: uint32_t ebp; /* +16 (10) */
71: uint32_t esp; /* +20 (14) */
72: };
73:
74: #ifdef CONFIG_FPU
75: /*
76: * FPU register for fsave/frstor
77: */
78: struct fpu_regs {
79: uint32_t ctrl_word;
80: uint32_t stat_word;
81: uint32_t tag_word;
82: uint32_t ip_offset;
83: uint32_t cs_sel;
84: uint32_t op_offset;
85: uint32_t op_sel;
86: uint32_t st[20];
87: };
88: #endif
89:
90: /*
91: * Processor context
92: */
93: struct context {
94: struct kern_regs kregs; /* kernel mode registers */
95: struct cpu_regs *uregs; /* user mode registers */
96: struct cpu_regs *saved_regs; /* saved user mode registers */
97: #ifdef CONFIG_FPU
98: struct fpu_regs *fregs; /* co-processor registers */
99: #endif
100: uint32_t esp0; /* top of kernel stack */
101: };
102:
103: typedef struct context *context_t; /* context id */
104:
105: /* types for context_set */
106: #define CTX_KSTACK 0 /* set kernel mode entry address */
107: #define CTX_KENTRY 1 /* set kernel mode entry address */
108: #define CTX_KARG 2 /* set kernel mode argument */
109: #define CTX_USTACK 3 /* set user mode stack address */
110: #define CTX_UENTRY 4 /* set user mode entry addres */
111: #define CTX_UARG 5 /* set user mode argument */
112:
113: extern void context_set(context_t, int, vaddr_t);
114: extern void context_switch(context_t, context_t);
115: extern void context_save(context_t);
116: extern void context_restore(context_t);
117:
118: /*
119: * Memory Management Unit
120: */
121: typedef uint32_t *pgd_t; /* page directory */
122:
123: /* memory page type */
124: #define PG_UNMAP 0 /* no page */
125: #define PG_READ 1 /* read only */
126: #define PG_WRITE 2 /* read/write */
127:
128: #ifdef CONFIG_MMU
129: extern void mmu_init(void);
130: extern pgd_t mmu_newmap(void);
131: extern void mmu_delmap(pgd_t);
132: extern int mmu_map(pgd_t, void *, void *, size_t, int);
133: extern void mmu_switch(pgd_t);
134: extern void *mmu_extract(pgd_t, void *, size_t);
135: #else /* CONFIG_MMU */
136: #define mmu_init() do {} while (0)
137: #endif /* CONFIG_MMU */
138:
139: /*
140: * User Memory access
141: */
142: extern int umem_copyin(const void *, void *, size_t);
143: extern int umem_copyout(const void *, void *, size_t);
144: extern int umem_strnlen(const char *, size_t, size_t *);
145:
146: extern void syscall_ret(void);
147: extern void breakpoint(void);
148:
149: #endif /* !_ARCH_H */
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