Annotation of sys/arch/alpha/pci/apecs_pci.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: apecs_pci.c,v 1.10 2006/03/26 20:23:08 brad Exp $ */
2: /* $NetBSD: apecs_pci.c,v 1.10 1996/11/13 21:13:25 cgd Exp $ */
3:
4: /*
5: * Copyright (c) 1995, 1996 Carnegie-Mellon University.
6: * All rights reserved.
7: *
8: * Author: Chris G. Demetriou
9: *
10: * Permission to use, copy, modify and distribute this software and
11: * its documentation is hereby granted, provided that both the copyright
12: * notice and this permission notice appear in all copies of the
13: * software, derivative works or modified versions, and any portions
14: * thereof, and that both notices appear in supporting documentation.
15: *
16: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18: * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19: *
20: * Carnegie Mellon requests users of this software to return to
21: *
22: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
23: * School of Computer Science
24: * Carnegie Mellon University
25: * Pittsburgh PA 15213-3890
26: *
27: * any improvements or extensions that they make and grant Carnegie the
28: * rights to redistribute these changes.
29: */
30:
31: #include <sys/param.h>
32: #include <sys/systm.h>
33: #include <sys/kernel.h>
34: #include <sys/device.h>
35:
36: #include <uvm/uvm_extern.h>
37:
38: #include <machine/autoconf.h> /* badaddr() proto */
39:
40: #include <dev/pci/pcireg.h>
41: #include <dev/pci/pcivar.h>
42: #include <alpha/pci/apecsreg.h>
43: #include <alpha/pci/apecsvar.h>
44:
45: void apecs_attach_hook(struct device *, struct device *,
46: struct pcibus_attach_args *);
47: int apecs_bus_maxdevs(void *, int);
48: pcitag_t apecs_make_tag(void *, int, int, int);
49: void apecs_decompose_tag(void *, pcitag_t, int *, int *,
50: int *);
51: pcireg_t apecs_conf_read(void *, pcitag_t, int);
52: void apecs_conf_write(void *, pcitag_t, int, pcireg_t);
53:
54: void
55: apecs_pci_init(pc, v)
56: pci_chipset_tag_t pc;
57: void *v;
58: {
59:
60: pc->pc_conf_v = v;
61: pc->pc_attach_hook = apecs_attach_hook;
62: pc->pc_bus_maxdevs = apecs_bus_maxdevs;
63: pc->pc_make_tag = apecs_make_tag;
64: pc->pc_decompose_tag = apecs_decompose_tag;
65: pc->pc_conf_read = apecs_conf_read;
66: pc->pc_conf_write = apecs_conf_write;
67: }
68:
69: void
70: apecs_attach_hook(parent, self, pba)
71: struct device *parent, *self;
72: struct pcibus_attach_args *pba;
73: {
74: }
75:
76: int
77: apecs_bus_maxdevs(cpv, busno)
78: void *cpv;
79: int busno;
80: {
81:
82: return 32;
83: }
84:
85: pcitag_t
86: apecs_make_tag(cpv, b, d, f)
87: void *cpv;
88: int b, d, f;
89: {
90:
91: return (b << 16) | (d << 11) | (f << 8);
92: }
93:
94: void
95: apecs_decompose_tag(cpv, tag, bp, dp, fp)
96: void *cpv;
97: pcitag_t tag;
98: int *bp, *dp, *fp;
99: {
100:
101: if (bp != NULL)
102: *bp = (tag >> 16) & 0xff;
103: if (dp != NULL)
104: *dp = (tag >> 11) & 0x1f;
105: if (fp != NULL)
106: *fp = (tag >> 8) & 0x7;
107: }
108:
109: pcireg_t
110: apecs_conf_read(cpv, tag, offset)
111: void *cpv;
112: pcitag_t tag;
113: int offset;
114: {
115: struct apecs_config *acp = cpv;
116: pcireg_t *datap, data;
117: int s, secondary, ba;
118: int32_t old_haxr2; /* XXX */
119:
120: s = 0; /* XXX gcc -Wuninitialized */
121: old_haxr2 = 0; /* XXX gcc -Wuninitialized */
122:
123: /* secondary if bus # != 0 */
124: pci_decompose_tag(&acp->ac_pc, tag, &secondary, 0, 0);
125: if (secondary) {
126: s = splhigh();
127: old_haxr2 = REGVAL(EPIC_HAXR2);
128: alpha_mb();
129: REGVAL(EPIC_HAXR2) = old_haxr2 | 0x1;
130: alpha_mb();
131: }
132:
133: datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(APECS_PCI_CONF |
134: tag << 5UL | /* XXX */
135: (offset & ~0x03) << 5 | /* XXX */
136: 0 << 5 | /* XXX */
137: 0x3 << 3); /* XXX */
138: data = (pcireg_t)-1;
139: if (!(ba = badaddr(datap, sizeof *datap)))
140: data = *datap;
141:
142: if (secondary) {
143: alpha_mb();
144: REGVAL(EPIC_HAXR2) = old_haxr2;
145: alpha_mb();
146: splx(s);
147: }
148:
149: #if 0
150: printf("apecs_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
151: data, datap, ba ? " (badaddr)" : "");
152: #endif
153:
154: return data;
155: }
156:
157: void
158: apecs_conf_write(cpv, tag, offset, data)
159: void *cpv;
160: pcitag_t tag;
161: int offset;
162: pcireg_t data;
163: {
164: struct apecs_config *acp = cpv;
165: pcireg_t *datap;
166: int s, secondary;
167: int32_t old_haxr2; /* XXX */
168:
169: s = 0; /* XXX gcc -Wuninitialized */
170: old_haxr2 = 0; /* XXX gcc -Wuninitialized */
171:
172: /* secondary if bus # != 0 */
173: pci_decompose_tag(&acp->ac_pc, tag, &secondary, 0, 0);
174: if (secondary) {
175: s = splhigh();
176: old_haxr2 = REGVAL(EPIC_HAXR2);
177: alpha_mb();
178: REGVAL(EPIC_HAXR2) = old_haxr2 | 0x1;
179: alpha_mb();
180: }
181:
182: datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(APECS_PCI_CONF |
183: tag << 5UL | /* XXX */
184: (offset & ~0x03) << 5 | /* XXX */
185: 0 << 5 | /* XXX */
186: 0x3 << 3); /* XXX */
187:
188: alpha_mb();
189: *datap = data;
190: alpha_mb();
191: alpha_mb();
192:
193: if (secondary) {
194: alpha_mb();
195: REGVAL(EPIC_HAXR2) = old_haxr2;
196: alpha_mb();
197: splx(s);
198: }
199:
200: #if 0
201: printf("apecs_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
202: reg, data, datap);
203: #endif
204: }
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