File: [local] / sys / arch / alpha / pci / irongate_bus_mem.c (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:04:45 2008 UTC (16 years, 6 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD Changes since 1.1: +0 -0 lines
Import of OpenBSD 4.2 release kernel tree with initial code to support
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO
Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)
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/* $OpenBSD: irongate_bus_mem.c,v 1.5 2001/11/06 19:53:13 miod Exp $ */
/* $NetBSD: irongate_bus_mem.c,v 1.7 2001/04/17 21:52:00 thorpej Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/syslog.h>
#include <sys/device.h>
#include <uvm/uvm_extern.h>
#include <machine/bus.h>
#include <alpha/pci/irongatereg.h>
#include <alpha/pci/irongatevar.h>
#define CHIP irongate
#define CHIP_EX_MALLOC_SAFE(v) (((struct irongate_config *)(v))->ic_mallocsafe)
#define CHIP_MEM_EXTENT(v) (((struct irongate_config *)(v))->ic_mem_ex)
#define CHIP_MEM_SYS_START(v) IRONGATE_MEM_BASE
/*
* AMD 751 core logic appears on EV6. We require at least EV56
* support for the assembler to emit BWX opcodes.
*/
__asm(".arch ev6");
#include <alpha/pci/pci_bwx_bus_mem_chipdep.c>
#include <sys/kcore.h>
#include <dev/isa/isareg.h>
extern phys_ram_seg_t mem_clusters[];
extern int mem_cluster_cnt;
void
irongate_bus_mem_init2(bus_space_tag_t t, void *v)
{
u_long size, start, end;
int i, error;
/*
* Since the AMD 751 doesn't have DMA windows, we need to
* allocate RAM out of the extent map.
*/
for (i = 0; i < mem_cluster_cnt; i++) {
start = mem_clusters[i].start;
size = mem_clusters[i].size & ~PAGE_MASK;
end = mem_clusters[i].start + size;
if (start <= IOM_BEGIN && end >= IOM_END) {
/*
* The ISA hole lies somewhere in this
* memory cluster. The UP1000 firmware
* doesn't report this to us properly,
* so we have to cope, since devices are
* mapped into the ISA hole, but RAM is
* not.
*
* Sigh, the UP1000 is a really cool machine,
* but it is sometimes too PC-like for my
* taste.
*/
if (start < IOM_BEGIN) {
error = extent_alloc_region(CHIP_MEM_EXTENT(v),
start, (IOM_BEGIN - start),
EX_NOWAIT |
(CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
if (error) {
printf("WARNING: unable to reserve "
"chunk from mem cluster %d "
"(0x%lx - 0x%lx)\n", i,
start, (u_long) IOM_BEGIN - 1);
}
}
if (end > IOM_END) {
error = extent_alloc_region(CHIP_MEM_EXTENT(v),
IOM_END, (end - IOM_END),
EX_NOWAIT |
(CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
if (error) {
printf("WARNING: unable to reserve "
"chunk from mem cluster %d "
"(0x%lx - 0x%lx)\n", i,
(u_long) IOM_END, end - 1);
}
}
} else {
error = extent_alloc_region(CHIP_MEM_EXTENT(v),
start, size,
EX_NOWAIT |
(CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
if (error) {
printf("WARNING: unable reserve mem cluster %d "
"(0x%lx - 0x%lx)\n", i, start,
start + (size - 1));
}
}
}
}