Annotation of sys/arch/alpha/pci/tsp_bus_mem.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: tsp_bus_mem.c,v 1.4 2003/09/02 17:25:21 miod Exp $ */
2: /* $NetBSD: tsp_bus_mem.c,v 1.4 2000/06/26 19:46:25 thorpej Exp $ */
3:
4: /*-
5: * Copyright (c) 1999 by Ross Harvey. All rights reserved.
6: *
7: * Redistribution and use in source and binary forms, with or without
8: * modification, are permitted provided that the following conditions
9: * are met:
10: * 1. Redistributions of source code must retain the above copyright
11: * notice, this list of conditions and the following disclaimer.
12: * 2. Redistributions in binary form must reproduce the above copyright
13: * notice, this list of conditions and the following disclaimer in the
14: * documentation and/or other materials provided with the distribution.
15: * 3. All advertising materials mentioning features or use of this software
16: * must display the following acknowledgement:
17: * This product includes software developed by Ross Harvey.
18: * 4. The name of Ross Harvey may not be used to endorse or promote products
19: * derived from this software without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
22: * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
24: * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
25: * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31: * SUCH DAMAGE.
32: *
33: */
34:
35: #include <sys/param.h>
36: #include <sys/systm.h>
37: #include <sys/malloc.h>
38: #include <sys/syslog.h>
39: #include <sys/device.h>
40:
41: #include <uvm/uvm_extern.h>
42:
43: #include <machine/bus.h>
44: #include <machine/autoconf.h>
45: #include <machine/rpb.h>
46:
47: #include <alpha/pci/tsreg.h>
48: #include <alpha/pci/tsvar.h>
49:
50: #define tsp_bus_mem() { Generate ctags(1) key. }
51:
52: #define CHIP tsp
53:
54: #define CHIP_EX_MALLOC_SAFE(v) (((struct tsp_config *)(v))->pc_mallocsafe)
55: #define CHIP_MEM_EXTENT(v) (((struct tsp_config *)(v))->pc_mem_ex)
56:
57: #define CHIP_MEM_SYS_START(v) (((struct tsp_config *)(v))->pc_iobase)
58:
59: /*
60: * Tsunami core logic appears on EV6. We require at least EV56
61: * support for the assembler to emit BWX opcodes.
62: */
63: __asm(".arch ev6");
64:
65: #define CHIP_EXTENT_NAME(v) ((struct tsp_config *)(v))->pc_mem_ex_name
66: #define CHIP_EXTENT_STORAGE(v) ((struct tsp_config *)(v))->pc_mem_ex_storage
67:
68: #include <alpha/pci/pci_bwx_bus_mem_chipdep.c>
69:
70: void
71: tsp_bus_mem_init2(void *v)
72: {
73: struct tsp_config *pcp = v;
74: struct ts_pchip *pccsr = pcp->pc_csr;
75: int i, error;
76:
77: /*
78: * Allocate the DMA windows out of the extent map.
79: */
80: for (i = 0; i < 4; i++) {
81: alpha_mb();
82: if ((pccsr->tsp_wsba[i].tsg_r & WSBA_ENA) == 0) {
83: /* Window not in use. */
84: continue;
85: }
86:
87: error = extent_alloc_region(CHIP_MEM_EXTENT(v),
88: WSBA_ADDR(pccsr->tsp_wsba[i].tsg_r),
89: WSM_LEN(pccsr->tsp_wsm[i].tsg_r),
90: EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
91: if (error) {
92: printf("WARNING: unable to reserve DMA window "
93: "0x%lx - 0x%lx\n",
94: WSBA_ADDR(pccsr->tsp_wsba[i].tsg_r),
95: WSBA_ADDR(pccsr->tsp_wsba[i].tsg_r) +
96: (WSM_LEN(pccsr->tsp_wsm[i].tsg_r) - 1));
97: }
98: }
99: }
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