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File: [local] / sys / arch / arm / include / trap.h (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:05:17 2008 UTC (16 years, 4 months ago) by nbrk
Import of OpenBSD 4.2 release kernel tree with initial code to support Jornada 720/728, StrongARM 1110-based handheld PC. At this point kernel roots on NFS and boots into vfs_mountroot() and traps. What is supported: - glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode (needs some palette tweaks for non black/white/blue colors, i think) - saic, SA11x0 interrupt controller (needs cleanup) - sacom, SA11x0 UART (supported only as boot console for now) - SA11x0 GPIO controller fully supported (but can't handle multiple interrupt handlers on one gpio pin) - sassp, SSP port on SA11x0 that attaches spibus - Jornada microcontroller (jmcu) to control kbd, battery, etc throught the SPI bus (wskbd attaches on jmcu, but not tested) - tod functions seem work - initial code for SA-1111 (chip companion) : this is TODO Next important steps, i think: - gpio and intc on sa1111 - pcmcia support for sa11x0 (and sa1111 help logic) - REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs) - root on wd0! (using already supported PCMCIA-ATA) |
/* $OpenBSD: trap.h,v 1.1 2004/02/01 05:09:49 drahn Exp $ */ /* $NetBSD: trap.h,v 1.4 2003/04/28 01:54:50 briggs Exp $ */ /* * Copyright (c) 1995 Mark Brinicombe. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Mark Brinicombe. * 4. The name of the company nor the name of the author may be used to * endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * RiscBSD kernel project * * trap.h * * Various trap definitions */ /* * Instructions used for breakpoints. * * These are undefined instructions. * Technically the userspace breakpoint could be a SWI but we want to * keep this the same as IPKDB which needs an undefined instruction as * a break point. * * Ideally ARM would define several standard instruction sequences for * use as breakpoints. * * The BKPT instruction isn't much use to us, since its behaviour is * unpredictable on ARMv3 and lower. * * The ARM ARM says that for maximum compatibility, we should use undefined * instructions that look like 0x.7f...f. . */ #define GDB_BREAKPOINT 0xe6000011 /* Used by GDB 4.x */ #define IPKDB_BREAKPOINT 0xe6000010 /* Used by IPKDB */ #define GDB5_BREAKPOINT 0xe7ffdefe /* Used by GDB 5.0 */ #define KERNEL_BREAKPOINT 0xe7ffffff /* Used by DDB */ #define KBPT_ASM ".word 0xe7ffdefe" #define USER_BREAKPOINT GDB_BREAKPOINT #define T_FAULT 1 /* End of trap.h */