Annotation of sys/arch/aviion/dev/nvramreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: nvramreg.h,v 1.3 2007/04/10 17:47:54 miod Exp $ */
2:
3: /*
4: * Copyright (c) 1992, 1993
5: * The Regents of the University of California. All rights reserved.
6: *
7: * This software was developed by the Computer Systems Engineering group
8: * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9: * contributed to Berkeley.
10: *
11: * All advertising materials mentioning features or use of this software
12: * must display the following acknowledgement:
13: * This product includes software developed by the University of
14: * California, Lawrence Berkeley Laboratory.
15: *
16: * Redistribution and use in source and binary forms, with or without
17: * modification, are permitted provided that the following conditions
18: * are met:
19: * 1. Redistributions of source code must retain the above copyright
20: * notice, this list of conditions and the following disclaimer.
21: * 2. Redistributions in binary form must reproduce the above copyright
22: * notice, this list of conditions and the following disclaimer in the
23: * documentation and/or other materials provided with the distribution.
24: * 3. Neither the name of the University nor the names of its contributors
25: * may be used to endorse or promote products derived from this software
26: * without specific prior written permission.
27: *
28: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38: * SUCH DAMAGE.
39: *
40: * @(#)clockreg.h 8.1 (Berkeley) 6/11/93
41: */
42:
43: /*
44: * Mostek TOD clock/NVRAM
45: */
46:
47: /*
48: * Mostek MK48T08 clock.
49: *
50: * This chip is 8k in size.
51: * The first TOD clock starts at offset 0x1FF8. The following structure
52: * describes last 2K of its 8K address space. The first 6K of the NVRAM
53: * space is used for various things as follows:
54: * 0000-0fff User Area
55: * 1000-10ff Networking Area
56: * 1100-16f7 Operating System Area
57: * 16f8-1ef7 ROM Debugger Area
58: * 1ef8-1ff7 Configuration Area (Ethernet address etc)
59: * 1ff8-1fff TOD clock
60: */
61:
62: /*
63: * On the AViiON, these offsets need shifting two bits, as they are 32 bit
64: * registers.
65: */
66: #define CLK_CSR 0 /* control register */
67: #define CLK_SEC 1 /* seconds (0..59; BCD) */
68: #define CLK_MIN 2 /* minutes (0..59; BCD) */
69: #define CLK_HOUR 3 /* hour (0..23; BCD) */
70: #define CLK_WDAY 4 /* weekday (1..7) */
71: #define CLK_DAY 5 /* day in month (1..31; BCD) */
72: #define CLK_MONTH 6 /* month (1..12; BCD) */
73: #define CLK_YEAR 7 /* year (0..99; BCD) */
74: #define CLK_NREG 8
75:
76: /* csr bits */
77: #define CLK_WRITE 0x80 /* want to write */
78: #define CLK_READ 0x40 /* want to read (freeze clock) */
79:
80: /*
81: * Data General, following Motorola, chose the year `1900' as their base count.
82: * It has already wrapped by now...
83: */
84: #define YEAR0 00
85:
86: #define AV_NVRAM_TOD_OFF 0x1fe0 /* offset of tod in NVRAM space */
87: #define MK48T02_SIZE 2 * 1024
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