File: [local] / sys / arch / hppa / gsc / osiop_gsc.c (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:05:54 2008 UTC (16 years, 6 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD Changes since 1.1: +0 -0 lines
Import of OpenBSD 4.2 release kernel tree with initial code to support
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO
Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)
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/* $OpenBSD: osiop_gsc.c,v 1.12 2005/12/13 23:13:45 mickey Exp $ */
/* $NetBSD: osiop_gsc.c,v 1.6 2002/10/02 05:17:50 thorpej Exp $ */
/*
* Copyright (c) 2001 Matt Fredette. All rights reserved.
* Copyright (c) 2001 Izumi Tsutsui. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1998 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/buf.h>
#include <sys/malloc.h>
#include <scsi/scsi_all.h>
#include <scsi/scsiconf.h>
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/iomod.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <dev/ic/osiopreg.h>
#include <dev/ic/osiopvar.h>
#include <hppa/dev/cpudevs.h>
#include <hppa/gsc/gscbusvar.h>
/* #include <hppa/hppa/machdep.h> */
#define OSIOP_GSC_RESET 0x0000
#define OSIOP_GSC_OFFSET 0x0100
int osiop_gsc_match(struct device *, void *, void *);
void osiop_gsc_attach(struct device *, struct device *, void *);
int osiop_gsc_intr(void *);
struct cfattach osiop_gsc_ca = {
sizeof(struct osiop_softc), osiop_gsc_match, osiop_gsc_attach
};
int
osiop_gsc_match(parent, match, aux)
struct device *parent;
void *match, *aux;
{
struct gsc_attach_args *ga = aux;
if (ga->ga_type.iodc_type != HPPA_TYPE_FIO ||
ga->ga_type.iodc_sv_model != HPPA_FIO_GSCSI)
return 0;
return 1;
}
void
osiop_gsc_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct osiop_softc *sc = (void *)self;
struct gsc_attach_args *ga = aux;
bus_space_handle_t ioh;
sc->sc_bst = ga->ga_iot;
sc->sc_dmat = ga->ga_dmatag;
if (bus_space_map(sc->sc_bst, ga->ga_hpa,
OSIOP_GSC_OFFSET + OSIOP_NREGS, 0, &ioh))
panic("osiop_gsc_attach: couldn't map I/O ports");
if (bus_space_subregion(sc->sc_bst, ioh,
OSIOP_GSC_OFFSET, OSIOP_NREGS, &sc->sc_reg))
panic("osiop_gsc_attach: couldn't get chip ports");
sc->sc_clock_freq = ga->ga_ca.ca_pdc_iodc_read->filler2[14] / 1000000;
if (!sc->sc_clock_freq)
sc->sc_clock_freq = 50;
sc->sc_dcntl = OSIOP_DCNTL_EA;
/* XXX set burst mode to 8 words (32 bytes) */
sc->sc_ctest7 = OSIOP_CTEST7_CDIS;
sc->sc_dmode = OSIOP_DMODE_BL8; /* | OSIOP_DMODE_FC2 */
sc->sc_flags = 0;
sc->sc_id = 7; /* XXX */
/*
* Reset the SCSI subsystem.
*/
bus_space_write_1(sc->sc_bst, ioh, OSIOP_GSC_RESET, 0);
DELAY(1000);
/*
* Call common attachment
*/
#ifdef OSIOP_DEBUG
{
extern int osiop_debug;
osiop_debug = -1;
}
#endif /* OSIOP_DEBUG */
osiop_attach(sc);
(void)gsc_intr_establish((struct gsc_softc *)parent,
ga->ga_irq, IPL_BIO, osiop_gsc_intr, sc, sc->sc_dev.dv_xname);
}
/*
* interrupt handler
*/
int
osiop_gsc_intr(arg)
void *arg;
{
struct osiop_softc *sc = arg;
u_int8_t istat;
/* This is potentially nasty, since the IRQ is level triggered... */
if (sc->sc_flags & OSIOP_INTSOFF)
return (0);
istat = osiop_read_1(sc, OSIOP_ISTAT);
if ((istat & (OSIOP_ISTAT_SIP | OSIOP_ISTAT_DIP)) == 0)
return (0);
/* Save interrupt details for the back-end interrupt handler */
sc->sc_sstat0 = osiop_read_1(sc, OSIOP_SSTAT0);
sc->sc_istat = istat;
/*
* Per page 4-18 of the LSI 53C710 Technical Manual,
* "insert a delay equivalent to 12 BCLK periods between
* the reads [of DSTAT and SSTAT0] to ensure that the
* interrupts clear properly." 1 BCLK = 40ns. Pg. 6-10.
*/
DELAY(25);
sc->sc_dstat = osiop_read_1(sc, OSIOP_DSTAT);
/* Deal with the interrupt */
osiop_intr(sc);
#ifdef USELEDS
ledctl(PALED_DISK, 0, 0);
#endif
return (1);
}