Annotation of sys/arch/hppa/spmath/divu.S, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: divu.S,v 1.10 2005/01/23 18:01:30 mickey Exp $ */
2: /*
3: (c) Copyright 1986 HEWLETT-PACKARD COMPANY
4: To anyone who acknowledges that this file is provided "AS IS"
5: without any express or implied warranty:
6: permission to use, copy, modify, and distribute this file
7: for any purpose is hereby granted without fee, provided that
8: the above copyright notice and this notice appears in all
9: copies, and that the name of Hewlett-Packard Company not be
10: used in advertising or publicity pertaining to distribution
11: of the software without specific, written prior permission.
12: Hewlett-Packard Company makes no representations about the
13: suitability of this software for any purpose.
14: */
15: /* @(#)divu.s: Revision: 1.11.88.1 Date: 93/12/07 15:06:01 */
16:
17: #include <machine/asm.h>
18: #define _LOCORE
19: #include <machine/frame.h>
20:
21: ;************************************************************************
22: ; Implement an integer divide routine for 32-bit operands and 32-bit quotient
23: ; and remainder with operand values of zero (divisor only) treated specially.
24: ;
25: ;****************************************************************************
26: ; Definitions
27: ;****************************************************************************
28: ;
29: ; General registers
30: ;
31: gr0 .reg %r0 ; General register zero
32: rem .reg %r3 ; remainder and upper part of dividend
33: quo .reg %r4 ; quotient and lower part of dividend
34: dvr .reg %r5 ; divisor
35: tp .reg %r6 ; temp. reg.
36:
37: ;******************************************************************************
38: .text
39: LEAF_ENTRY(divu)
40: stws,ma rem,4(sp) ; save registers on stack
41: stws,ma quo,4(sp) ; save registers on stack
42: stws,ma dvr,4(sp) ; save registers on stack
43: stws,ma tp,4(sp) ; save registers on stack
44:
45: addi 0,arg2,dvr ; get divisor
46: addi 0,arg1,quo ; get lower dividend
47: addi 0,arg0,rem ; get upper dividend
48:
49: comib,>,n 0,dvr,hibit ; check for dvr >= 2**31
50: addi -1,gr0,tp ; set V-bit to 1
51: ds 0,tp,0
52: add quo,quo,quo ; shift msb bit into carry
53: ds rem,dvr,rem ; 1st divide step, if carry
54: ; out, msb of quotient = 0
55: addc quo,quo,quo ; shift quo with/into carry
56: ds rem,dvr,rem ; 2nd divide step
57: addc quo,quo,quo ; shift quo with/into carry
58: ds rem,dvr,rem ; 3rd divide step
59: addc quo,quo,quo ; shift quo with/into carry
60: ds rem,dvr,rem ; 4th divide step
61: addc quo,quo,quo ; shift quo with/into carry
62: ds rem,dvr,rem ; 5th divide step
63: addc quo,quo,quo ; shift quo with/into carry
64: ds rem,dvr,rem ; 6th divide step
65: addc quo,quo,quo ; shift quo with/into carry
66: ds rem,dvr,rem ; 7th divide step
67: addc quo,quo,quo ; shift quo with/into carry
68: ds rem,dvr,rem ; 8th divide step
69: addc quo,quo,quo ; shift quo with/into carry
70: ds rem,dvr,rem ; 9th divide step
71: addc quo,quo,quo ; shift quo with/into carry
72: ds rem,dvr,rem ; 10th divide step
73: addc quo,quo,quo ; shift quo with/into carry
74: ds rem,dvr,rem ; 11th divide step
75: addc quo,quo,quo ; shift quo with/into carry
76: ds rem,dvr,rem ; 12th divide step
77: addc quo,quo,quo ; shift quo with/into carry
78: ds rem,dvr,rem ; 13th divide step
79: addc quo,quo,quo ; shift quo with/into carry
80: ds rem,dvr,rem ; 14th divide step
81: addc quo,quo,quo ; shift quo with/into carry
82: ds rem,dvr,rem ; 15th divide step
83: addc quo,quo,quo ; shift quo with/into carry
84: ds rem,dvr,rem ; 16th divide step
85: addc quo,quo,quo ; shift quo with/into carry
86: ds rem,dvr,rem ; 17th divide step
87: addc quo,quo,quo ; shift quo with/into carry
88: ds rem,dvr,rem ; 18th divide step
89: addc quo,quo,quo ; shift quo with/into carry
90: ds rem,dvr,rem ; 19th divide step
91: addc quo,quo,quo ; shift quo with/into carry
92: ds rem,dvr,rem ; 20th divide step
93: addc quo,quo,quo ; shift quo with/into carry
94: ds rem,dvr,rem ; 21st divide step
95: addc quo,quo,quo ; shift quo with/into carry
96: ds rem,dvr,rem ; 22nd divide step
97: addc quo,quo,quo ; shift quo with/into carry
98: ds rem,dvr,rem ; 23rd divide step
99: addc quo,quo,quo ; shift quo with/into carry
100: ds rem,dvr,rem ; 24th divide step
101: addc quo,quo,quo ; shift quo with/into carry
102: ds rem,dvr,rem ; 25th divide step
103: addc quo,quo,quo ; shift quo with/into carry
104: ds rem,dvr,rem ; 26th divide step
105: addc quo,quo,quo ; shift quo with/into carry
106: ds rem,dvr,rem ; 27th divide step
107: addc quo,quo,quo ; shift quo with/into carry
108: ds rem,dvr,rem ; 28th divide step
109: addc quo,quo,quo ; shift quo with/into carry
110: ds rem,dvr,rem ; 29th divide step
111: addc quo,quo,quo ; shift quo with/into carry
112: ds rem,dvr,rem ; 30th divide step
113: addc quo,quo,quo ; shift quo with/into carry
114: ds rem,dvr,rem ; 31st divide step
115: addc quo,quo,quo ; shift quo with/into carry
116: ds rem,dvr,rem ; 32nd divide step,
117: addc quo,quo,quo ; shift last quo bit into quo
118: addb,>=,n rem,0,finish ; branch if pos. rem
119: add,< dvr,0,0 ; if dvr > 0, add dvr
120: add,tr rem,dvr,rem ; for correcting rem.
121: sub rem,dvr,rem ; else subtract dvr
122: ;
123: ; end of divide routine
124: ;
125: finish stws rem,0(arg3) ; save remainder in high part
126: ; of result
127: stws quo,4(arg3) ; save quotient in low part
128: ; of result
129: ldws,mb -4(sp),tp ; restore registers
130: ldws,mb -4(sp),dvr ; restore registers
131: ldws,mb -4(sp),quo ; restore registers
132: bv 0(rp) ; return
133: ldws,mb -4(sp),rem ; restore registers
134: ;
135: hibit ldo 32(0),tp ; initialize loop counter
136: add quo,quo,quo ; shift high bit into carry
137: loop addc rem,rem,rem ; shift in high bit of dvdl
138: addc,<> 0,0,0 ; if bit shifted out of dvdu,
139: ; want to do subtract
140: comb,<<,n rem,dvr,nosub ; if upper dividend > dvr,
141: sub rem,dvr,rem ; subtract and
142: add,tr dvr,dvr,0 ; set carry
143: nosub addi 0,0,0 ; otherwise clear carry
144: addib,> -1,tp,loop ; inc. counter; finished?
145: addc quo,quo,quo ; shift bit of result into dvdl
146: b finish+4 ; finish up
147: stws rem,0(arg3) ; save remainder in high part
148: ; of result
149: EXIT(divu)
150:
151: .end
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