Annotation of sys/arch/macppc/pci/mpc106reg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: mpc106reg.h,v 1.3 2004/01/27 10:04:15 miod Exp $ */
2:
3: /*
4: * Copyright (c) 1997 Per Fogelstrom
5: *
6: * Redistribution and use in source and binary forms, with or without
7: * modification, are permitted provided that the following conditions
8: * are met:
9: * 1. Redistributions of source code must retain the above copyright
10: * notice, this list of conditions and the following disclaimer.
11: * 2. Redistributions in binary form must reproduce the above copyright
12: * notice, this list of conditions and the following disclaimer in the
13: * documentation and/or other materials provided with the distribution.
14: *
15: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
16: * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
19: * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25: * SUCH DAMAGE.
26: *
27: *
28: * mpc106reg.h: PowerPC to PCI bridge controller
29: * This code will probably work with the 105 as well.
30: */
31:
32: #ifndef _MACHINE_MPC106REG_H_
33: #define _MACHINE_MPC106REG_H_
34:
35: /* Where we map the PCI memory space - MAP A*/
36: #define MPC106_V_PCI_MEM_SPACE 0xc0000000 /* Virtual */
37: #define MPC106_P_PCI_MEM_SPACE 0xc0000000 /* Physical */
38:
39: /* Where we map the PCI I/O space - MAP A*/
40: #define MPC106_P_ISA_IO_SPACE 0x80000000
41: #define MPC106_V_ISA_IO_SPACE 0x80000000
42: #define MPC106_V_PCI_IO_SPACE 0x80000000
43: #define MPC106_P_PCI_IO_SPACE 0x80000000
44:
45: /* Where we map the config space */
46: #define MPC106_PCI_CONF_SPACE (MPC106_V_ISA_IO_SPACE + 0x00800000)
47:
48: /* Where we map the PCI memory space - MAP B*/
49: #define MPC106_P_PCI_MEM_SPACE_MAP_B 0x80000000 /* Physical */
50:
51: /* Where we map the PCI I/O space - MAP B*/
52: #define MPC106_P_PCI_IO_SPACE_MAP_B 0xfe000000
53:
54: /* offsets from base pointer */
55: #define MPC106_REGOFFS(x) ((x) | 0x80000000)
56:
57: /* Where PCI devices sees CPU memory. */
58: #define MPC106_PCI_CPUMEM 0x80000000
59:
60: #define MPC106_PCI_VENDOR 0x00
61: #define MPC106_PCI_DEVICE 0x02
62: #define MPC106_PCI_CMD 0x04
63: #define MPC106_PCI_STAT 0x06
64: #define MPC106_PCI_REVID 0x08
65:
66: #define MPC106_PCI_PMGMT 0x70
67:
68: void
69: mpc_cfg_write_1( struct pcibr_config *cp, u_int32_t reg, u_int8_t val);
70: void
71: mpc_cfg_write_2( struct pcibr_config *cp, u_int32_t reg, u_int16_t val);
72: void
73: mpc_cfg_write_4( struct pcibr_config *cp, u_int32_t reg, u_int32_t val);
74:
75: u_int8_t
76: mpc_cfg_read_1( struct pcibr_config *cp, u_int32_t reg);
77:
78: u_int16_t
79: mpc_cfg_read_2( struct pcibr_config *cp, u_int32_t reg);
80:
81: u_int32_t
82: mpc_cfg_read_4( struct pcibr_config *cp, u_int32_t reg);
83:
84: #endif /* _MACHINE_MPC106REG_H_ */
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