Annotation of sys/arch/mvme68k/dev/scc.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: scc.h,v 1.5 2003/06/02 05:09:14 deraadt Exp $ */
2:
3: /*
4: * Copyright (c) 1995 Theo de Raadt
5: * Copyright (c) 1993 Paul Mackerras.
6: * All rights reserved.
7: *
8: * Redistribution and use in source and binary forms, with or without
9: * modification, are permitted provided that the following conditions
10: * are met:
11: * 1. Redistributions of source code must retain the above copyright
12: * notice, this list of conditions and the following disclaimer.
13: * 2. Redistributions in binary form must reproduce the above copyright
14: * notice, this list of conditions and the following disclaimer in the
15: * documentation and/or other materials provided with the distribution.
16: *
17: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27: */
28: /*
29: * SCC I/O register definitions
30: */
31:
32: #define PCLK_FREQ_147 5000000
33: #define PCLK_FREQ_162 10000000
34:
35: /*
36: * physical layout in memory of the SCC chips on the MVME147
37: */
38: struct scc_147 {
39: u_char cr;
40: u_char dr;
41: };
42:
43: /*
44: * physical layout in memory of the SCC chips on the MVME162
45: * (and possibly the MVME172 as well?)
46: */
47: struct scc_162 {
48: u_char xx1;
49: u_char cr;
50: u_char xx2;
51: u_char dr;
52: };
53:
54: struct sccregs {
55: volatile u_char *s_cr;
56: volatile u_char *s_dr;
57: u_char s_val[16];
58: };
59:
60: int mc_rev1_bug = 0;
61:
62: #define ZREAD0(scc) ((*((scc)->s_cr)))
63: #define ZREAD(scc, n) ((*((scc)->s_cr)) = n, (*((scc)->s_cr)))
64: #if 1
65: #define ZREADD(scc) mc_rev1_bug ? (ZWRITE0((scc), 8), ZREAD0((scc))) : ((*((scc)->s_dr)))
66: #else
67: #define ZREADD(scc) ((*((scc)->s_dr)))
68: #endif
69:
70: #define ZWRITE0(scc, v) ((*((scc)->s_cr)) = (u_char)(v))
71: #define ZWRITE(scc, n, v) (ZWRITE0(scc, (u_char)n), \
72: ZWRITE0(scc, (scc)->s_val[n] = (u_char)(v)))
73: #if 1
74: #define ZWRITED(scc, v) mc_rev1_bug ? ((ZWRITE0((scc), 8), ZWRITE0((scc), (u_char)(v)))) : \
75: (((*((scc)->s_dr)) = (u_char)(v)))
76: #else
77: #define ZWRITED(scc, v) ((*((scc)->s_dr)) = (u_char)(v))
78: #endif
79:
80: #define ZBIS(scc, n, v) (ZWRITE(scc, n, (scc)->s_val[n] | (v)))
81: #define ZBIC(scc, n, v) (ZWRITE(scc, n, (scc)->s_val[n] & ~(v)))
82:
83: #define SCC_RXFULL 1 /* bits in rr0 */
84: #define SCC_TXRDY 4
85: #define SCC_DCD 8
86: #define SCC_CTS 0x20
87:
88: #define SCC_RCVEN 1 /* bits in wr3 */
89:
90: #define SCC_RTS 2 /* bits in wr5 */
91: #define SCC_DTR 0x80
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