Annotation of sys/arch/sparc/dev/scfreg.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: scfreg.h,v 1.2 2003/06/02 18:40:59 jason Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
! 5: * All rights reserved.
! 6: *
! 7: * This software was developed by Jason L. Wright under contract with
! 8: * RTMX Incorporated (http://www.rtmx.com).
! 9: *
! 10: * Redistribution and use in source and binary forms, with or without
! 11: * modification, are permitted provided that the following conditions
! 12: * are met:
! 13: * 1. Redistributions of source code must retain the above copyright
! 14: * notice, this list of conditions and the following disclaimer.
! 15: * 2. Redistributions in binary form must reproduce the above copyright
! 16: * notice, this list of conditions and the following disclaimer in the
! 17: * documentation and/or other materials provided with the distribution.
! 18: *
! 19: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
! 20: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
! 21: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
! 22: * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
! 23: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
! 24: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
! 25: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 26: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
! 27: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
! 28: * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 29: * POSSIBILITY OF SUCH DAMAGE.
! 30: */
! 31:
! 32: struct scf_regs {
! 33: volatile u_int8_t led1; /* user led 1 control */
! 34: volatile u_int8_t led2; /* user led 2 control */
! 35: volatile u_int8_t fmpcr1; /* flash prog control 1 */
! 36: volatile u_int8_t rssr; /* rotary switch status */
! 37: volatile u_int8_t _reserved0[4]; /* unused */
! 38: volatile u_int8_t brscr; /* boot ROM size ctrl */
! 39: volatile u_int8_t fmpcr2; /* flash prog control reg 2 */
! 40: volatile u_int8_t fmpvcr; /* flash prog voltage ctrl */
! 41: volatile u_int8_t ssldcr; /* 7-segment led ctrl */
! 42: volatile u_int8_t fmb0; /* FMB chan 0 data discard */
! 43: volatile u_int8_t fmb1; /* FMB chan 1 data discard */
! 44: volatile u_int8_t _reserved1[1]; /* unused */
! 45: volatile u_int8_t lcaid; /* LCA identification */
! 46: };
! 47:
! 48: /* led1/led2: user led 1/led 2 control */
! 49: #define LED_MASK 0x0f
! 50: #define LED_COLOR_MASK 0x03 /* color mask */
! 51: #define LED_COLOR_OFF 0x00 /* led is off */
! 52: #define LED_COLOR_GREEN 0x01 /* led is green */
! 53: #define LED_COLOR_RED 0x02 /* led is red */
! 54: #define LED_COLOR_YELLOW 0x03 /* led is yellow */
! 55: #define LED_BLINK_MASK 0x0c /* blink mask */
! 56: #define LED_BLINK_NONE 0x00 /* led does not blink */
! 57: #define LED_BLINK_HALF 0x04 /* led blinks at 0.5hz */
! 58: #define LED_BLINK_ONE 0x08 /* led blinks at 1.0hz */
! 59: #define LED_BLINK_TWO 0x0c /* led blinks at 2.0hz */
! 60:
! 61: /* fmpcr1: flash memory programming control register 1 */
! 62: #define FMPCR1_MASK 0xf0 /* must be or'd with this on write */
! 63: #define FMPCR1_SELADDR 0x0e /* address select */
! 64: #define FMPCR1_SELROM 0x01 /* 0=first,1=second flash memory */
! 65:
! 66: /* rssr: rotary switch status register */
! 67: #define RSSR_MASK 0x0f /* value of user rotary switch */
! 68:
! 69: /* brscr: boot ROM size control register */
! 70: /* ??? */
! 71:
! 72: /* fmpcr2: flash memory programming control register 2 */
! 73: #define FMPCR2_MASK 0xfe /* must be or'd with this on write */
! 74: #define FMPCR2_SELBOOT 0x01 /* 0=USER,1=BOOT flash memory */
! 75:
! 76: /* fmpvcr: flash memory programming voltage control register */
! 77: #define FMPVCR_MASK 0xfe /* must be or'd with this on write */
! 78: #define FMPVCR_VPP 0x01 /* 1=prog voltage on, 0 = off */
! 79:
! 80: /* fmb0/fmb1: FMB channel 0/1 data discard status register */
! 81: #define FMB_MSBVALID 0x01 /* (ro) whether to discard FMB data */
! 82:
! 83: /* ssldcr: seven segment LED display control register */
! 84: /*
! 85: * Layout:
! 86: * AAA
! 87: * FF BB
! 88: * GGG
! 89: * EE CC
! 90: * DDD P
! 91: */
! 92: #define SSLDCR_A 0x01
! 93: #define SSLDCR_B 0x02
! 94: #define SSLDCR_C 0x04
! 95: #define SSLDCR_D 0x08
! 96: #define SSLDCR_E 0x10
! 97: #define SSLDCR_F 0x20
! 98: #define SSLDCR_G 0x40
! 99: #define SSLDCR_P 0x80
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