Annotation of sys/arch/sparc64/fpu/fpu_compare.c, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: fpu_compare.c,v 1.3 2003/06/02 23:27:55 millert Exp $ */
! 2: /* $NetBSD: fpu_compare.c,v 1.3 2001/08/26 05:46:31 eeh Exp $ */
! 3:
! 4: /*
! 5: * Copyright (c) 1992, 1993
! 6: * The Regents of the University of California. All rights reserved.
! 7: *
! 8: * This software was developed by the Computer Systems Engineering group
! 9: * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
! 10: * contributed to Berkeley.
! 11: *
! 12: * All advertising materials mentioning features or use of this software
! 13: * must display the following acknowledgement:
! 14: * This product includes software developed by the University of
! 15: * California, Lawrence Berkeley Laboratory.
! 16: *
! 17: * Redistribution and use in source and binary forms, with or without
! 18: * modification, are permitted provided that the following conditions
! 19: * are met:
! 20: * 1. Redistributions of source code must retain the above copyright
! 21: * notice, this list of conditions and the following disclaimer.
! 22: * 2. Redistributions in binary form must reproduce the above copyright
! 23: * notice, this list of conditions and the following disclaimer in the
! 24: * documentation and/or other materials provided with the distribution.
! 25: * 3. Neither the name of the University nor the names of its contributors
! 26: * may be used to endorse or promote products derived from this software
! 27: * without specific prior written permission.
! 28: *
! 29: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
! 30: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
! 31: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! 32: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
! 33: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! 34: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! 35: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 36: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! 37: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! 38: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! 39: * SUCH DAMAGE.
! 40: *
! 41: * @(#)fpu_compare.c 8.1 (Berkeley) 6/11/93
! 42: */
! 43:
! 44: /*
! 45: * CMP and CMPE instructions.
! 46: *
! 47: * These rely on the fact that our internal wide format is achieved by
! 48: * adding zero bits to the end of narrower mantissas.
! 49: */
! 50:
! 51: #include <sys/types.h>
! 52:
! 53: #include <machine/reg.h>
! 54:
! 55: #include <sparc64/fpu/fpu_arith.h>
! 56: #include <sparc64/fpu/fpu_emu.h>
! 57:
! 58: /*
! 59: * Perform a compare instruction (with or without unordered exception).
! 60: * This updates the fcc field in the fsr.
! 61: *
! 62: * If either operand is NaN, the result is unordered. For cmpe, this
! 63: * causes an NV exception. Everything else is ordered:
! 64: * |Inf| > |numbers| > |0|.
! 65: * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0),
! 66: * so we get this directly. Note, however, that two zeros compare equal
! 67: * regardless of sign, while everything else depends on sign.
! 68: *
! 69: * Incidentally, two Infs of the same sign compare equal (per the 80387
! 70: * manual---it would be nice if the SPARC documentation were more
! 71: * complete).
! 72: */
! 73: void
! 74: fpu_compare(struct fpemu *fe, int cmpe)
! 75: {
! 76: register struct fpn *a, *b;
! 77: register int cc;
! 78: FPU_DECL_CARRY
! 79:
! 80: a = &fe->fe_f1;
! 81: b = &fe->fe_f2;
! 82:
! 83: if (ISNAN(a) || ISNAN(b)) {
! 84: /*
! 85: * In any case, we already got an exception for signalling
! 86: * NaNs; here we may replace that one with an identical
! 87: * exception, but so what?.
! 88: */
! 89: if (cmpe)
! 90: fe->fe_cx = FSR_NV;
! 91: cc = FSR_CC_UO;
! 92: goto done;
! 93: }
! 94:
! 95: /*
! 96: * Must handle both-zero early to avoid sign goofs. Otherwise,
! 97: * at most one is 0, and if the signs differ we are done.
! 98: */
! 99: if (ISZERO(a) && ISZERO(b)) {
! 100: cc = FSR_CC_EQ;
! 101: goto done;
! 102: }
! 103: if (a->fp_sign) { /* a < 0 (or -0) */
! 104: if (!b->fp_sign) { /* b >= 0 (or if a = -0, b > 0) */
! 105: cc = FSR_CC_LT;
! 106: goto done;
! 107: }
! 108: } else { /* a > 0 (or +0) */
! 109: if (b->fp_sign) { /* b <= -0 (or if a = +0, b < 0) */
! 110: cc = FSR_CC_GT;
! 111: goto done;
! 112: }
! 113: }
! 114:
! 115: /*
! 116: * Now the signs are the same (but may both be negative). All
! 117: * we have left are these cases:
! 118: *
! 119: * |a| < |b| [classes or values differ]
! 120: * |a| > |b| [classes or values differ]
! 121: * |a| == |b| [classes and values identical]
! 122: *
! 123: * We define `diff' here to expand these as:
! 124: *
! 125: * |a| < |b|, a,b >= 0: a < b => FSR_CC_LT
! 126: * |a| < |b|, a,b < 0: a > b => FSR_CC_GT
! 127: * |a| > |b|, a,b >= 0: a > b => FSR_CC_GT
! 128: * |a| > |b|, a,b < 0: a < b => FSR_CC_LT
! 129: */
! 130: #define opposite_cc(cc) ((cc) == FSR_CC_LT ? FSR_CC_GT : FSR_CC_LT)
! 131: #define diff(magnitude) (a->fp_sign ? opposite_cc(magnitude) : (magnitude))
! 132: if (a->fp_class < b->fp_class) { /* |a| < |b| */
! 133: cc = diff(FSR_CC_LT);
! 134: goto done;
! 135: }
! 136: if (a->fp_class > b->fp_class) { /* |a| > |b| */
! 137: cc = diff(FSR_CC_GT);
! 138: goto done;
! 139: }
! 140: /* now none can be 0: only Inf and numbers remain */
! 141: if (ISINF(a)) { /* |Inf| = |Inf| */
! 142: cc = FSR_CC_EQ;
! 143: goto done;
! 144: }
! 145: /*
! 146: * Only numbers remain. To compare two numbers in magnitude, we
! 147: * simply subtract them.
! 148: */
! 149: a = fpu_sub(fe);
! 150: if (a->fp_class == FPC_ZERO)
! 151: cc = FSR_CC_EQ;
! 152: else
! 153: cc = diff(FSR_CC_GT);
! 154:
! 155: done:
! 156: fe->fe_fsr = (fe->fe_fsr & ~FSR_FCC) | (cc << FSR_FCC_SHIFT);
! 157: }
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