Annotation of sys/arch/zaurus/dev/zaurus_scoopreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: zaurus_scoopreg.h,v 1.8 2007/03/18 20:50:23 uwe Exp $ */
2:
3: /*
4: * Copyright (c) 2005 Uwe Stuehler <uwe@bsdx.de>
5: *
6: * Permission to use, copy, modify, and distribute this software for any
7: * purpose with or without fee is hereby granted, provided that the above
8: * copyright notice and this permission notice appear in all copies.
9: *
10: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14: * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15: * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16: * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17: */
18:
19: #define SCOOP_SIZE 0x2c
20:
21: /* registers and values */
22:
23: #define SCOOP_MCR 0x00
24: #define SCP_MCR_IOCARD 0x0010
25: #define SCOOP_CDR 0x04 /* card detect register */
26: #define SCP_CDR_DETECT 0x0002
27: #define SCOOP_CSR 0x08 /* card status register */
28: #define SCP_CSR_READY 0x0002
29: #define SCP_CSR_MISSING 0x0004
30: #define SCP_CSR_WPROT 0x0008
31: #define SCP_CSR_BVD1 0x0010
32: #define SCP_CSR_BVD2 0x0020
33: #define SCP_CSR_3V 0x0040
34: #define SCP_CSR_PWR 0x0080
35: #define SCOOP_CPR 0x0c /* card power register */
36: #define SCP_CPR_OFF 0x0000
37: #define SCP_CPR_3V 0x0001 /* 3V for CF card */
38: #define SCP_CPR_5V 0x0002 /* 5V for CF card */
39: #define SCP_CPR_SD_3V 0x0004 /* 3.3V for SD/MMC card */
40: #define SCP_CPR_VOLTAGE_MSK 0x0007
41: #define SCP_CPR_PWR 0x0080
42: #define SCOOP_CCR 0x10 /* card control register */
43: #define SCP_CCR_RESET 0x0080
44: #define SCOOP_IRR 0x14 /* XXX for pcic: bit 0x4 role is? */
45: #define SCOOP_IRM 0x14
46: #define SCOOP_IMR 0x18
47: #define SCP_IMR_READY 0x0002
48: #define SCP_IMR_DETECT 0x0004
49: #define SCP_IMR_WRPROT 0x0008
50: #define SCP_IMR_STSCHG 0x0010
51: #define SCP_IMR_BATWARN 0x0020
52: #define SCP_IMR_UNKN0 0x0040
53: #define SCP_IMR_UNKN1 0x0080
54: #define SCOOP_ISR 0x1c
55: #define SCOOP_GPCR 0x20 /* GPIO pin direction (R/W) */
56: #define SCOOP_GPWR 0x24 /* GPIO pin output level (R/W) */
57: #define SCOOP_GPRR 0x28 /* GPIO pin input level (R) */
58:
59: /* GPIO bits */
60:
61: #define SCOOP0_LED_GREEN 1
62: #define SCOOP0_JK_B_C3000 2
63: #define SCOOP0_CHARGE_OFF_C3000 3
64: #define SCOOP0_MUTE_L 4
65: #define SCOOP0_MUTE_R 5
66: #define SCOOP0_AKIN_PULLUP 6
67: #define SCOOP0_CF_POWER_C3000 6
68: #define SCOOP0_APM_ON 7
69: #define SCOOP0_LED_ORANGE_C3000 7
70: #define SCOOP0_BACKLIGHT_CONT 8
71: #define SCOOP0_JK_A_C3000 8
72: #define SCOOP0_MIC_BIAS 9
73: #define SCOOP0_ADC_TEMP_ON_C3000 9
74:
75: #define SCOOP1_IR_ON 1
76: #define SCOOP1_AKIN_PULLUP 2
77: #define SCOOP1_RESERVED_3 3
78: #define SCOOP1_RESERVED_4 4
79: #define SCOOP1_RESERVED_5 5
80: #define SCOOP1_RESERVED_6 6
81: #define SCOOP1_BACKLIGHT_CONT 7
82: #define SCOOP1_BACKLIGHT_ON 8
83: #define SCOOP1_MIC_BIAS 9
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