Annotation of sys/dev/ic/si4136reg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: si4136reg.h,v 1.2 2004/10/01 04:08:45 jsg Exp $ */
2: /* $NetBSD$ */
3:
4: /*
5: * Copyright (c) 2004 David Young. All rights reserved.
6: *
7: * This code was written by David Young.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. Neither the name of the author nor the names of any co-contributors
18: * may be used to endorse or promote products derived from this software
19: * without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
22: * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
23: * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
24: * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
25: * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
26: * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
27: * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29: * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30: * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32: * OF SUCH DAMAGE.
33: */
34:
35: #ifndef _DEV_IC_SI4136REG_H_
36: #define _DEV_IC_SI4136REG_H_
37:
38: /*
39: * Serial bus format for Silicon Laboratories Si4126/Si4136 RF synthesizer.
40: */
41: #define SI4126_TWI_DATA_MASK BITS(21, 4)
42: #define SI4126_TWI_ADDR_MASK BITS(3, 0)
43:
44: /*
45: * Registers for Silicon Laboratories Si4126/Si4136 RF synthesizer.
46: */
47: #define SI4126_MAIN 0 /* main configuration */
48: #define SI4126_MAIN_AUXSEL_MASK BITS(13, 12) /* aux. output pin function */
49: /* reserved */
50: #define SI4126_MAIN_AUXSEL_RSVD LSHIFT(0x0, SI4126_MAIN_AUXSEL_MASK)
51: /* force low */
52: #define SI4126_MAIN_AUXSEL_FRCLOW LSHIFT(0x1, SI4126_MAIN_AUXSEL_MASK)
53: /* Lock Detect (LDETB) */
54: #define SI4126_MAIN_AUXSEL_LDETB LSHIFT(0x3, SI4126_MAIN_AUXSEL_MASK)
55:
56: #define SI4126_MAIN_IFDIV_MASK BITS(11, 10) /* IFOUT = IFVCO
57: * frequency / 2**IFDIV.
58: */
59:
60: #define SI4126_MAIN_XINDIV2 BIT(6) /* 1: divide crystal input (XIN) by 2 */
61: #define SI4126_MAIN_LPWR BIT(5) /* 1: low-power mode */
62: #define SI4126_MAIN_AUTOPDB BIT(3) /* 1: equivalent to
63: * reg[SI4126_POWER] <-
64: * SI4126_POWER_PDIB |
65: * SI4126_POWER_PDRB.
66: *
67: * 0: power-down under control of
68: * reg[SI4126_POWER].
69: */
70:
71: #define SI4126_GAIN 1 /* phase detector gain */
72: #define SI4126_GAIN_KPI_MASK BITS(5, 4) /* IF phase detector gain */
73: #define SI4126_GAIN_KP2_MASK BITS(3, 2) /* RF2 phase detector gain */
74: #define SI4126_GAIN_KP1_MASK BITS(1, 0) /* RF1 phase detector gain */
75:
76: #define SI4126_POWER 2 /* powerdown */
77: #define SI4126_POWER_PDIB BIT(1) /* 1: IF synthesizer on */
78: #define SI4126_POWER_PDRB BIT(0) /* 1: RF synthesizer on */
79:
80: #define SI4126_RF1N 3 /* RF1 N divider */
81: #define SI4126_RF2N 4 /* RF2 N divider */
82: #define SI4126_IFN 5 /* IF N divider */
83: #define SI4126_RF1R 6 /* RF1 R divider */
84: #define SI4126_RF2R 7 /* RF2 R divider */
85: #define SI4126_IFR 8 /* IF R divider */
86:
87: #endif /* _DEV_IC_SI4136REG_H_ */
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