Annotation of sys/dev/isa/wdsreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: wdsreg.h,v 1.4 1997/11/07 08:07:11 niklas Exp $ */
2:
3: typedef u_int8_t physaddr[3];
4: typedef u_int8_t physlen[3];
5: #define ltophys _lto3b
6: #define phystol _3btol
7:
8: /* WD7000 registers */
9: #define WDS_STAT 0 /* read */
10: #define WDS_IRQSTAT 1 /* read */
11:
12: #define WDS_CMD 0 /* write */
13: #define WDS_IRQACK 1 /* write */
14: #define WDS_HCR 2 /* write */
15:
16: #define WDS_IO_PORTS 8 /* size in I/O-space */
17:
18: /* WDS_STAT (read) defs */
19: #define WDSS_IRQ 0x80
20: #define WDSS_RDY 0x40
21: #define WDSS_REJ 0x20
22: #define WDSS_INIT 0x10
23:
24: /* WDS_IRQSTAT (read) defs */
25: #define WDSI_MASK 0xc0
26: #define WDSI_ERR 0x00
27: #define WDSI_MFREE 0x80
28: #define WDSI_MSVC 0xc0
29:
30: /* WDS_CMD (write) defs */
31: #define WDSC_NOOP 0x00
32: #define WDSC_INIT 0x01
33: #define WDSC_DISUNSOL 0x02
34: #define WDSC_ENAUNSOL 0x03
35: #define WDSC_IRQMFREE 0x04
36: #define WDSC_SCSIRESETSOFT 0x05
37: #define WDSC_SCSIRESETHARD 0x06
38: #define WDSC_MSTART(m) (0x80 + (m))
39: #define WDSC_MMSTART(m) (0xc0 + (m))
40:
41: /* WDS_HCR (write) defs */
42: #define WDSH_IRQEN 0x08
43: #define WDSH_DRQEN 0x04
44: #define WDSH_SCSIRESET 0x02
45: #define WDSH_ASCRESET 0x01
46:
47: #define WDS_NSEG 17
48:
49: struct wds_scat_gath {
50: physlen seg_len;
51: physaddr seg_addr;
52: };
53:
54: struct wds_cmd {
55: u_int8_t opcode;
56: u_int8_t targ;
57: struct scsi_generic scb;
58: u_int8_t stat;
59: u_int8_t venderr;
60: physlen len;
61: physaddr data;
62: physaddr link;
63: u_int8_t write;
64: u_int8_t xx[6];
65: };
66:
67: struct wds_scb {
68: struct wds_cmd cmd;
69: struct wds_cmd sense;
70:
71: struct wds_scat_gath scat_gath[WDS_NSEG];
72: struct scsi_sense_data sense_data;
73: /*----------------------------------------------------------------*/
74: #define SCB_PHYS_SIZE ((int)&((struct wds_scb *)0)->chain)
75:
76: TAILQ_ENTRY(wds_scb) chain;
77: struct wds_scb *nexthash;
78: long hashkey;
79: struct scsi_xfer *xs;
80: int flags;
81: #define SCB_ALLOC 0x01
82: #define SCB_ABORT 0x02
83: #ifdef WDSDIAG
84: #define SCB_SENDING 0x04
85: #endif
86: #define SCB_POLLED 0x08
87: #define SCB_SENSE 0x10
88: #define SCB_DONE 0x20 /* for internal commands only */
89: #define SCB_BUFFER 0x40
90: int timeout;
91:
92: #ifdef notyet
93: struct isadma_seg scb_phys[1]; /* phys segment of this scb */
94: struct isadma_seg data_phys[WDS_NSEG]; /* phys segments of data */
95: int data_nseg; /* number of phys segments of data */
96: #endif
97: struct wds_buf *buf;
98: };
99:
100: #define WDSX_SCSICMD 0x00
101: #define WDSX_SCSISG 0x01
102: #define WDSX_OPEN_RCVBUF 0x80
103: #define WDSX_RCV_CMD 0x81
104: #define WDSX_RCV_DATA 0x82
105: #define WDSX_RCV_DATASTAT 0x83
106: #define WDSX_SND_DATA 0x84
107: #define WDSX_SND_DATASTAT 0x85
108: #define WDSX_SND_CMDSTAT 0x86
109: #define WDSX_READINIT 0x88
110: #define WDSX_READSCSIID 0x89
111: #define WDSX_SETUNSOLIRQMASK 0x8a
112: #define WDSX_GETUNSOLIRQMASK 0x8b
113: #define WDSX_GETFIRMREV 0x8c
114: #define WDSX_EXECDIAG 0x8d
115: #define WDSX_SETEXECPARM 0x8e
116: #define WDSX_GETEXECPARM 0x8f
117:
118: struct wds_mbx_out {
119: u_int8_t cmd;
120: physaddr scb_addr;
121: };
122:
123: struct wds_mbx_in {
124: u_int8_t stat;
125: physaddr scb_addr;
126: };
127:
128: /*
129: * mbo.cmd values
130: */
131: #define WDS_MBO_FREE 0x0 /* MBO entry is free */
132: #define WDS_MBO_START 0x1 /* MBO activate entry */
133:
134: /*
135: * mbi.stat values
136: */
137: #define WDS_MBI_FREE 0x00 /* MBI entry is free */
138: #define WDS_MBI_OK 0x01 /* completed without error */
139: #define WDS_MBI_OKERR 0x02 /* completed with error */
140: #define WDS_MBI_ETIME 0x04
141: #define WDS_MBI_ERESET 0x05
142: #define WDS_MBI_ETARCMD 0x06
143: #define WDS_MBI_ERESEL 0x80
144: #define WDS_MBI_ESEL 0x81
145: #define WDS_MBI_EABORT 0x82
146: #define WDS_MBI_ESRESET 0x83
147: #define WDS_MBI_EHRESET 0x84
148:
149: struct wds_setup {
150: u_int8_t opcode;
151: u_int8_t scsi_id;
152: u_int8_t buson_t;
153: u_int8_t busoff_t;
154: u_int8_t xx;
155: physaddr mbaddr;
156: u_int8_t nomb;
157: u_int8_t nimb;
158: };
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