Annotation of sys/dev/mii/icsphyreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: icsphyreg.h,v 1.2 1999/03/09 00:02:44 jason Exp $ */
2: /* $NetBSD: icsphyreg.h,v 1.1 1998/11/02 23:46:20 thorpej Exp $ */
3:
4: /*-
5: * Copyright (c) 1998 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10: * NASA Ames Research Center.
11: *
12: * Redistribution and use in source and binary forms, with or without
13: * modification, are permitted provided that the following conditions
14: * are met:
15: * 1. Redistributions of source code must retain the above copyright
16: * notice, this list of conditions and the following disclaimer.
17: * 2. Redistributions in binary form must reproduce the above copyright
18: * notice, this list of conditions and the following disclaimer in the
19: * documentation and/or other materials provided with the distribution.
20: * 3. All advertising materials mentioning features or use of this software
21: * must display the following acknowledgement:
22: * This product includes software developed by the NetBSD
23: * Foundation, Inc. and its contributors.
24: * 4. Neither the name of The NetBSD Foundation nor the names of its
25: * contributors may be used to endorse or promote products derived
26: * from this software without specific prior written permission.
27: *
28: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38: * POSSIBILITY OF SUCH DAMAGE.
39: */
40:
41: #ifndef _DEV_MII_ICSPHYREG_H_
42: #define _DEV_MII_ICSPHYREG_H_
43:
44: /*
45: * Register definitions for the ICS1890 Ethernet PHY
46: * Further documentation can be found at:
47: * http://www.icst.com/products/pinfo/1890.htm
48: */
49:
50: #define MII_ICSPHY_ECR 0x10 /* Extended Control Register */
51: #define ECR_OVR 0x8000 /* disable command reg overwrites */
52: #define ECR_PHYADDR_MASK 0x07c0 /* PHY address mask */
53: #define ECR_CTEST 0x0020 /* Stream Cipher Test Mode */
54: #define ECR_IECT 0x0004 /* Invalid Error Code Test */
55: #define ECR_SSD 0x0001 /* Stream Cipher Disable */
56:
57: #define MII_ICSPHY_QPR 0x11 /* Quick Poll Register */
58: #define QPR_SPEED 0x8000 /* 100Mbps */
59: #define QPR_FDX 0x4000 /* Full dupled */
60: #define QPR_ANB2 0x2000 /* Autoneg monitor bit 2 */
61: #define QPR_ANB1 0x1000 /* Autoneg monitor bit 1 */
62: #define QPR_ANB0 0x0800 /* Autoneg monitor bit 0 */
63: #define QPR_RXERR 0x0400 /* Receive signal lost */
64: #define QPR_PLLERR 0x0200 /* PLL error */
65: #define QPR_FCARR 0x0100 /* False carrier detected */
66: #define QPR_INVALSYM 0x0080 /* Invalid Symbol Detected */
67: #define QPR_HALT 0x0040 /* Halt Symbol Detected */
68: #define QPR_PREEM 0x0020 /* Two Idle Symbols together */
69: #define QPR_ACOMP 0x0010 /* Autonegotiation complete */
70: #define QPR_JABBER 0x0004 /* Jabber detected */
71: #define QPR_RFAULT 0x0002 /* Remote Fault */
72: #define QPR_LINK 0x0001 /* Link */
73:
74: #define MII_ICSPHY_TTR 0x12 /* 10baseT Operations Register */
75: #define TTR_RJABBER 0x8000 /* Remote Jabber */
76: #define TTR_POLARITY 0x4000 /* Polarity Reversed */
77: #define TTR_NOJABBER 0x0020 /* Disable Jabber Check */
78: #define TTR_LOOP 0x0010 /* Loopback mode */
79: #define TTR_NOAPOLARITY 0x0008 /* Disable auto polarity correction */
80: #define TTR_NOSQE 0x0004 /* Disable SQE check */
81: #define TTR_NOLINK 0x0002 /* Disable Link check */
82: #define TTR_NOSQUELCH 0x0001 /* Disable squelch */
83:
84: #define MII_ICSPHY_ECR2 0x13 /* Extended Control Register 2 */
85: #define ECR2_REPEATER 0x8000 /* Repeater Mode */
86: #define ECR2_HWSW 0x4000 /* hw/sw config priority */
87: #define ECR2_LPRF 0x2000 /* link partner supports rem fault */
88: #define ECR2_FORCERF 0x0400 /* Force transmit of rem fault */
89: #define ECR2_RFPUP 0x0010 /* Rem fault on power up */
90: #define ECR2_Q10T 0x0004 /* Qualified 10baseT data */
91: #define ECR2_10TPROT 0x0002 /* 10baseT protect */
92: #define ECR2_AUTOPWRDN 0x0001 /* automatic power down */
93:
94: #endif /* _DEV_MII_ICSPHYREG_H_ */
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