Annotation of sys/dev/pci/lofnvar.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: lofnvar.h,v 1.9 2003/06/02 19:08:58 jason Exp $ */
2:
3: /*
4: * Copyright (c) 2001-2002 Jason L. Wright (jason@thought.net)
5: * All rights reserved.
6: *
7: * Redistribution and use in source and binary forms, with or without
8: * modification, are permitted provided that the following conditions
9: * are met:
10: * 1. Redistributions of source code must retain the above copyright
11: * notice, this list of conditions and the following disclaimer.
12: * 2. Redistributions in binary form must reproduce the above copyright
13: * notice, this list of conditions and the following disclaimer in the
14: * documentation and/or other materials provided with the distribution.
15: *
16: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19: * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
25: * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26: * POSSIBILITY OF SUCH DAMAGE.
27: *
28: * Effort sponsored in part by the Defense Advanced Research Projects
29: * Agency (DARPA) and Air Force Research Laboratory, Air Force
30: * Materiel Command, USAF, under agreement number F30602-01-2-0537.
31: *
32: */
33:
34: #define LOFN_RNGBUF_SIZE 8 /* size in 32 bit elements */
35:
36: struct lofn_softc {
37: struct device sc_dv;
38: void * sc_ih;
39: bus_space_handle_t sc_sh;
40: bus_space_tag_t sc_st;
41: bus_dma_tag_t sc_dmat;
42: u_int32_t sc_rngbuf[LOFN_RNGBUF_SIZE], sc_ier;
43: int32_t sc_cid;
44: union lofn_reg sc_tmp;
45: union lofn_reg sc_zero;
46: SIMPLEQ_HEAD(,lofn_q) sc_queue;
47: struct lofn_q *sc_current;
48: };
49:
50: struct lofn_q {
51: SIMPLEQ_ENTRY(lofn_q) q_next;
52: int (*q_start)(struct lofn_softc *, struct lofn_q *);
53: void (*q_finish)(struct lofn_softc *, struct lofn_q *);
54: struct cryptkop *q_krp;
55: };
56:
57: #define READ_REG(sc,r) \
58: bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (r))
59: #define READ_REG_0(sc,r) READ_REG((sc), (r) | LOFN_WIN_0)
60: #define READ_REG_1(sc,r) READ_REG((sc), (r) | LOFN_WIN_1)
61: #define READ_REG_2(sc,r) READ_REG((sc), (r) | LOFN_WIN_2)
62: #define READ_REG_3(sc,r) READ_REG((sc), (r) | LOFN_WIN_3)
63:
64: #define WRITE_REG(sc,r,v) \
65: bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (r), (v))
66: #define WRITE_REG_0(sc,r,v) WRITE_REG((sc), (r) | LOFN_WIN_0, (v))
67: #define WRITE_REG_1(sc,r,v) WRITE_REG((sc), (r) | LOFN_WIN_1, (v))
68: #define WRITE_REG_2(sc,r,v) WRITE_REG((sc), (r) | LOFN_WIN_2, (v))
69: #define WRITE_REG_3(sc,r,v) WRITE_REG((sc), (r) | LOFN_WIN_3, (v))
70:
71: #ifndef LOFN_RNG_SCALAR
72: #define LOFN_RNG_SCALAR 0x00000700
73: #endif
74:
75: /* C = M ^ E mod N */
76: #define LOFN_MODEXP_PAR_M 0
77: #define LOFN_MODEXP_PAR_E 1
78: #define LOFN_MODEXP_PAR_N 2
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