Annotation of sys/dev/pci/pciide_acer_reg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: pciide_acer_reg.h,v 1.7 2004/09/24 07:38:38 grange Exp $ */
2: /* $NetBSD: pciide_acer_reg.h,v 1.4 2001/07/26 20:02:22 bouyer Exp $ */
3:
4: /*
5: * Copyright (c) 1999 Manuel Bouyer.
6: *
7: * Redistribution and use in source and binary forms, with or without
8: * modification, are permitted provided that the following conditions
9: * are met:
10: * 1. Redistributions of source code must retain the above copyright
11: * notice, this list of conditions and the following disclaimer.
12: * 2. Redistributions in binary form must reproduce the above copyright
13: * notice, this list of conditions and the following disclaimer in the
14: * documentation and/or other materials provided with the distribution.
15: * 3. All advertising materials mentioning features or use of this software
16: * must display the following acknowledgement:
17: * This product includes software developed by Manuel Bouyer.
18: * 4. Neither the name of the University nor the names of its contributors
19: * may be used to endorse or promote products derived from this software
20: * without specific prior written permission.
21: *
22: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32: *
33: */
34:
35: #ifndef _DEV_PCI_PCIIDE_ACER_REG_H_
36: #define _DEV_PCI_PCIIDE_ACER_REG_H_
37:
38: /* class code attribute register 1 (1 byte) */
39: #define ACER_CCAR1 0x43
40: #define ACER_CHANSTATUS_RO 0x40
41: #define PCIIDE_CHAN_RO(chan) (0x20 >> (chan))
42:
43: /* from Linux, 80 pins cable detect */
44: #define ACER_0x4A 0x4a
45: /*
46: * bit 0 is 0 -> primary has 80 pin cable
47: * bit 1 is 0 -> secondary has 80 pin cable
48: */
49: #define ACER_0x4A_80PIN(chan) (0x1 << (chan))
50:
51: /* From FreeBSD, for UDMA mode > 2 */
52: #define ACER_0x4B 0x4b
53: #define ACER_0x4B_UDMA66 0x01
54: /* From Linux */
55: #define ACER_0x4B_CDETECT 0x08
56:
57: /* class code attribute register 2 (1 byte) */
58: #define ACER_CCAR2 0x4d
59: #define ACER_CHANSTATUSREGS_RO 0x80
60:
61: /* class code attribute register 3 (1 byte) */
62: #define ACER_CCAR3 0x50
63: #define ACER_CCAR3_PI 0x02
64:
65: /* flexible channel setting register */
66: #define ACER_FCS 0x52
67: #define ACER_FCS_TIMREG(chan,drv) ((0x8) >> ((drv) + (chan) * 2))
68:
69: /* CD-ROM control register */
70: #define ACER_CDRC 0x53
71: #define ACER_CDRC_FIFO_DISABLE 0x02
72: #define ACER_CDRC_DMA_EN 0x01
73:
74: /* Fifo threshold and Ultra-DMA settings (4 bytes). */
75: #define ACER_FTH_UDMA 0x54
76: #define ACER_FTH_VAL(chan, drv, val) \
77: (((val) & 0x3) << ((drv) * 4 + (chan) * 8))
78: #define ACER_FTH_OPL(chan, drv, val) \
79: (((val) & 0x3) << (2 + (drv) * 4 + (chan) * 8))
80: #define ACER_UDMA_EN(chan, drv) \
81: (0x8 << (16 + (drv) * 4 + (chan) * 8))
82: #define ACER_UDMA_TIM(chan, drv, val) \
83: (((val) & 0x7) << (16 + (drv) * 4 + (chan) * 8))
84:
85: /* drives timings setup (1 byte) */
86: #define ACER_IDETIM(chan, drv) (0x5a + (drv) + (chan) * 4)
87:
88: /* IRQ and drive select status */
89: #define ACER_CHIDS 0x75
90: #define ACER_CHIDS_DRV(channel) ((0x4) << (channel))
91: #define ACER_CHIDS_INT(channel) ((0x1) << (channel))
92:
93: /* Linux: south-bridge's enable bit (m1533) */
94: #define ACER_0x79 0x79
95: #define ACER_0x79_REVC2_EN 0x4
96: #define ACER_0x79_EN 0x2
97:
98: /*
99: * IDE bus frequency (1 byte)
100: * This should be setup by the BIOS - can we rely on this ?
101: */
102: #define ACER_IDE_CLK 0x78
103:
104: /* acer UDMA3/4/5 from FreeBSD */
105: static int8_t acer_udma[] = {0x4, 0x3, 0x2, 0x1, 0x0, 0x7};
106: static int8_t acer_pio[] = {0x0c, 0x58, 0x44, 0x33, 0x31};
107: #ifdef unused
108: static int8_t acer_dma[] = {0x08, 0x33, 0x31};
109: #endif
110:
111: #endif /* !_DEV_PCI_PCIIDE_ACER_REG_H_ */
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