Annotation of sys/dev/sun/uperfio.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: uperfio.h,v 1.4 2005/06/03 10:53:58 miod Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 2002 Jason L. Wright (jason@thought.net)
! 5: * All rights reserved.
! 6: *
! 7: * Redistribution and use in source and binary forms, with or without
! 8: * modification, are permitted provided that the following conditions
! 9: * are met:
! 10: * 1. Redistributions of source code must retain the above copyright
! 11: * notice, this list of conditions and the following disclaimer.
! 12: * 2. Redistributions in binary form must reproduce the above copyright
! 13: * notice, this list of conditions and the following disclaimer in the
! 14: * documentation and/or other materials provided with the distribution.
! 15: *
! 16: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
! 17: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
! 18: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
! 19: * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
! 20: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
! 21: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
! 22: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 23: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
! 24: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
! 25: * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 26: * POSSIBILITY OF SUCH DAMAGE.
! 27: *
! 28: * Effort sponsored in part by the Defense Advanced Research Projects
! 29: * Agency (DARPA) and Air Force Research Laboratory, Air Force
! 30: * Materiel Command, USAF, under agreement number F30602-01-2-0537.
! 31: *
! 32: */
! 33:
! 34: #define UPERF_CNT0 1
! 35: #define UPERF_CNT1 2
! 36:
! 37: #define UPERFSRC_SYSCK 1 /* system clock count */
! 38: #define UPERFSRC_PRALL 2 /* # of p-requests, all srcs */
! 39: #define UPERFSRC_PRP0 3 /* # of p-requests, processor 0 */
! 40: #define UPERFSRC_PRU2S 4 /* # of p-requests, U2S */
! 41: #define UPERFSRC_UPA128 5 /* # cycles UPA 128bit bus busy */
! 42: #define UPERFSRC_UPA64 6 /* # cycles UPA 64bit bus busy */
! 43: #define UPERFSRC_PIOS 7 /* # cycles stalled during PIO */
! 44: #define UPERFSRC_MEMRI 8 /* # memory requests issued */
! 45: #define UPERFSRC_MCBUSY 9 /* # cycles mem ctrlr busy */
! 46: #define UPERFSRC_PXSH 10 /* # cyc stalled for pending xact scoreboard hit */
! 47: #define UPERFSRC_P0CWMR 11 /* # coherent wr miss req, Proc0 */
! 48: #define UPERFSRC_P1CWMR 12 /* # coherent wr miss req, Proc1 */
! 49: #define UPERFSRC_CIT 13 /* # coherent intervention xacts */
! 50: #define UPERFSRC_U2SDAT 14 /* # data xacts from U2S */
! 51: #define UPERFSRC_CRXI 15 /* # coherent read xacts issued */
! 52: #define UPERFSRC_RDP0 16 /* read requests from Proc0 */
! 53: #define UPERFSRC_P0CRMR 17 /* # coherent rd miss req, Proc0 */
! 54: #define UPERFSRC_P0PIO 18 /* PIO accesses from Proc 0 */
! 55: #define UPERFSRC_MEMRC 19 /* # memory requests completed */
! 56: #define UPERFSRC_P1RR 20 /* Proc 1 read requests */
! 57: #define UPERFSRC_CRMP1 21 /* Proc 1 coherent read misses */
! 58: #define UPERFSRC_PIOP1 22 /* Proc 1 PIO accesses */
! 59: #define UPERFSRC_CWXI 23 /* coherent write xacts issued */
! 60: #define UPERFSRC_RP0 24 /* read requests from Proc 0 */
! 61: #define UPERFSRC_SDVRA 25 /* streaming dvma rds, bus A */
! 62: #define UPERFSRC_SDVWA 26 /* streaming dvma wrs, bus A */
! 63: #define UPERFSRC_CDVRA 27 /* consistent dvma rds, bus A */
! 64: #define UPERFSRC_CDVWA 28 /* consistent dvma wrs, bus A */
! 65: #define UPERFSRC_SBMA 29 /* streaming buffer misses, A */
! 66: #define UPERFSRC_DVA 30 /* cycles A granted to dvma */
! 67: #define UPERFSRC_DVWA 31 /* words xfered on bus A */
! 68: #define UPERFSRC_PIOA 32 /* pio cycles on bus A */
! 69: #define UPERFSRC_SDVRB 33 /* streaming dvma rds, bus A */
! 70: #define UPERFSRC_SDVWB 34 /* streaming dvma wrs, bus A */
! 71: #define UPERFSRC_CDVRB 35 /* consistent dvma rds, bus A */
! 72: #define UPERFSRC_CDVWB 36 /* consistent dvma wrs, bus A */
! 73: #define UPERFSRC_SBMB 37 /* streaming buffer misses, A */
! 74: #define UPERFSRC_DVB 38 /* cycles A granted to dvma */
! 75: #define UPERFSRC_DVWB 39 /* words xfered on bus A */
! 76: #define UPERFSRC_PIOB 40 /* pio cycles on bus A */
! 77: #define UPERFSRC_TLBMISS 41 /* tlb misses */
! 78: #define UPERFSRC_NINTRS 42 /* number of interrupts */
! 79: #define UPERFSRC_INACK 43 /* interrupt nacks on UPA */
! 80: #define UPERFSRC_PIOR 44 /* PIO read xfers */
! 81: #define UPERFSRC_PIOW 45 /* PIO write xfers */
! 82: #define UPERFSRC_MERGE 46 /* merge buffer xacts */
! 83: #define UPERFSRC_TBLA 47 /* dma retries for tblwalk, A */
! 84: #define UPERFSRC_STCA 48 /* dma retries for tblwalk, A */
! 85: #define UPERFSRC_TBLB 49 /* dma retries for tblwalk, B */
! 86: #define UPERFSRC_STCB 50 /* dma retries for tblwalk, B */
! 87:
! 88: struct uperf_io {
! 89: int cnt_flags;
! 90: int cnt_src0;
! 91: int cnt_src1;
! 92: u_int32_t cnt_val0;
! 93: u_int32_t cnt_val1;
! 94: };
! 95:
! 96: #define UPIO_GCNTSRC _IOWR('U', 0, struct uperf_io) /* get cntr src */
! 97: #define UPIO_SCNTSRC _IOWR('U', 1, struct uperf_io) /* set cntr src */
! 98: #define UPIO_CLRCNT _IOWR('U', 2, struct uperf_io) /* clear cntrs */
! 99: #define UPIO_GETCNT _IOWR('U', 3, struct uperf_io) /* get cntrs */
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